1. Field of the Invention
The present invention relates to a method for growing a silicon single crystal, which is used to produce semiconductor integrated circuit elements, and which method is capable of effectively suppressing the generation of Grown-in defects in a simple production process without any increase in the production cost.
2. Description of the Prior Art
Conventionally, such a silicon single crystal used as a material for large-scale integrated circuits is produced mostly by the Czokralski method (hereinafter referred to as “CZ method”).
FIG. 1 is a schematic sectional view of a single crystal growth apparatus, and the drawing is used to explain the method for growing a silicon single crystal with the CZ method. A crucible 1 is disposed in the center of the growth apparatus. The crucible 1 is a double structure in which an inner vessel 1a made of quartz and an outer vessel 1b made of graphite are included. The crucible 1 having such a structural arrangement is supported on a rotary shaft in such a manner that it is rotated at a predetermined speed of revolution. A cylindrical heater 2 is coaxially disposed in the outside of the crucible 1. The crucible 1 is filled with a molten material 3, which is melted by the heater 2. A pulling shaft 4 consisting of a pulling wire and others is disposed in the center of the crucible 1 in such a way that it is hung from the upper part of the growth apparatus.
A seed crystal 5 is connected to an end of the pulling shaft 4. The seed crystal 5 is in contact with the surface of the molten material 3 in order to grow a single crystal 6. Moreover, a heat shield 7 is disposed above the surface of the molten material 3 in such a way that it surrounds the single crystal 6. The pulling shaft 4 is pulled in such a manner that the seed crystal 5 surrounded by the heat shield 7 is rotated at a predetermined speed of revolution in the direction opposite to the rotary direction of the crucible 1. In this state, the growth of the single crystal 6 is achieved by solidifying the molten material 3 at an end of the seed crystal 5.
The silicon single crystal thus grown is sliced or cut, thereby enabling silicon wafers to be produced therefrom. Such a wafer is used to produce semiconductor large-scale integrated circuit elements. It is known that a failure of the produced integrated circuit mostly results from particles. Such particles may be detected by means of a surface inspection device, which is available from the market. The results of detection reveals that the particles which are generated in the course of producing integrated circuits and/or directly from a process device itself are detected, and that defects as Voids formed during the growth of the single crystal are also detected.
In recent years, a rapid progress for increasing the integration density of the semiconductor integrated circuit elements (devices) requires a much higher and severer quality of a silicon wafer. Accordingly, a fine fabrication as for a design rule requires a very severe control of particles in a production line. In order to attain a complete control of the particles in the production line, not only a wafer for producing the devices, but also a dummy wafer for monitoring particles is introduced into the production line. It is, of course, required that such a dummy wafer for monitoring particles includes an extremely low density of crystal defects, which may be detected as particles by means of the surface inspection device.
When either a silicon single crystal produced by the CZ method or a wafer produced by slicing such a silicon single crystal is subjected to a heat treatment at high temperature under an oxidization atmosphere, ring-shaped oxidization-induced stacking faults (hereinafter referred to as “OSF rings”) are occasionally generated coaxially with respect to the pulling shaft for the single crystal. In addition, several different types of micro defects are also formed on the surface. These defects are called crystal defects, which are formed during the growth of the single crystal, and they are usually referred to as so called Grown-in defects.
In the single crystal having such an OSF ring, the crystal property in the inside area is different from that in the outside area, and therefore the type of the Grown-in defects detected is also different in accordance with the area of residence. Grown-in defects relating to point defects (vacancies), which deteriorate the gate oxide integrity in a MOS type device, are generated at a density of 105–106 counts/cm3 in the inside area of the OSF ring. Such a grown-in defect is called a COP (Crystal Originated Particle), the inside of which has an octahedral structure of a Void as a basic shape.
In an ULSI device according to the design rule of not more than 0.35 μm, such a COP provides not only a deterioration in the gate oxide integrity, but also a device isolation failure between the elements or devices. As a result, the production of devices at high yield requires the removal of COPs from the wafer surface layer. In accordance with the results detected by means of a surface inspection device, the COPs are detected as foreign substances on the surface. Accordingly, it is necessary to reduce the size of the foreign substances or to eliminate the substances themselves in the wafer used as a particle monitor. On the other hand, dislocation clusters of the Grown-in defects relating to point defects (interstitial silicon atoms), which deteriorate the current leakage characteristic of a device, are generated at a density of 103–104 counts/cm3 in the outside area of the OSF ring.
FIG. 2 is a typical plan view of an observed crystal surface, for which an oxidation treatment is carried out at a high temperature after slicing a grown silicon single crystal. A COP area is positioned at the center of the single crystal and an OSF ring region is extending to the outside thereof. There exists an oxide precipitate region in the outside of the OSF ring region. Moreover, an oxide precipitate inhibited region is extending to the outside of the oxide precipitate region, and finally there exists a dislocation cluster region at the outermost area.
On the crystal surface shown in FIG. 2, there exist no Grown-in defects, except for oxide precipitates having a very small size or those at an extremely small density, in these three regions, i.e., the OSF ring region, the oxide precipitate region connected thereto and the oxide precipitate inhibited region. As described above, the OSF ring region is an area in which oxidation-induced stacking faults (hereinafter referred to as “OSF”) are formed by the heat treatment at a high temperature, and it is estimated that the nuclei for the stacking faults may be oxide precipitates. In the as-grown state before the heat treatment is carried out at a high temperature, it is extremely difficult to directly detect OSF-inducing nuclei (hereinafter referred to as “OSF nuclei”). However, in accordance with the evaluation by means of the above-mentioned surface inspection device, it is ascertained that the OSF ring region is regarded as an area in which Grown-in defects cannot be observed.
The pulling rate in the crystal growth influences on the position of generating an OSF ring. Given that the temperature gradient in the cooling rate from the melting point down to about 1300° C. during the growth of a silicon single crystal is G and that the pulling rate is V, it is found that the OSF ring generating position is controlled by a relation expressed by V/G. Accordingly, an OSF ring may be generated at an arbitrary position on the crystal surface by setting the V/G value in an appropriate range during the growth of the single crystal.
Since the OSF ring may be generated at an arbitrary position with the above-mentioned method, several methods have been proposed for reducing the Grown-in defects generated cocentrically on the wafer surface by controlling the position of generating the OSF ring. A method for reducing the density of COPs generated in the inside of an OSF ring by generating the OSF ring at the outer circumference of a wafer has been demonstrated as follows:
In Japanese Patent Publication No. 03-080338, a method for eliminating COPs in the surface layer is disclosed, wherein a silicon wafer is subjected to a heat treatment at a temperature of not less than 1100° C. under a non-oxidizable atmosphere including hydrogen gas just before a thermal oxidization layer is formed on the wafer surface. In Japanese Patent Application Laid-open Publication No. 10-208987, moreover, a method for eliminating small-sized COPs with a heat treatment is disclosed, wherein the size of the defects is decreased by increasing the density of COPs in the as-grown state. However, in any of the above-mentioned methods for reducing the density of COPs, a heat treatment is required to reduce the defects, and therefore this causes the number of process steps to be increased, and the production cost is also increased.
On the other hand, a method has been also proposed either for concentrating the defect region resulting from the COPs to the center of a wafer by forming an OSF ring in the inside of the wafer, or for eliminating the defect region at the center of a wafer by forming an OSF ring in the inside of the wafer. In the method, the single crystal has to be pulled at an extremely low rate, hence causing the productivity to be decreased. As for the wafer quality, there is a possibility that dislocations are generated by the shrinkage of the OSF ring towards the inside of the crystal.
In addition, a method has been proposed for forming the oxide precipitate region and the oxide precipitate prohibited region positioned in the outside of the OSF ring region over the entire wafer surface and for maintaining these regions to be aligned in the directions of the crystal axis. However, in order to realize this method, it is necessary to produce a hot zone in which defects are uniformly distributed on the surface, and further to grow a crystal under the condition of precisely controlling the above-mentioned V/G value. Accordingly, these make it difficult to maintain the workability.
As described above, no effective means are provided, even if the prior art is applied, that is, even if the number of defects in both the COP region and OSF ring region are reduced by controlling the position of generating the OFS ring or even if the oxide precipitate region and the oxide precipitate prohibited region are extended over the entire surface of the wafer.
To overcome these problems, the present applicant has already proposed a method for growing a silicon single crystal, wherein by doping nitrogen during the crystal growth, the entire crystal surface of a wafer includes a region consisting of OSF nuclei, or both OSF nuclei and an oxide precipitate region, or an oxide precipitate prohibited region together with these regions (see Japanese Patent Application Laid-open Publication No. 2000-272997).
In fact, it is noted that the proposed method successfully suppresses the generation of Grown-in defects in the silicon wafer thus produced without any increase in the production cost. Nevertheless, extremely small COPs occasionally remain in the center of the wafer. Such fine COPs may be visualized as pits by repeatedly cleaning the wafer, and therefore it will be expected that a further improvement is required to eliminate fine COPs in the center of the wafer.